The current trend in electronics is to make electronic devices with smaller components operating at higher clock frequencies and power levels generating more and more heat. These components include electronic packages such as microprocessor and memory packages. The electronic packages typically include a die that is usually mounted onto a supporting substrate sometimes referred to as a carrier or package substrate (PS). The electronic package, in turn, is typically physically and electrically coupled to a printed circuit board (PCB). The die and the substrate are typically made of multiple ceramic or silicon layers. The heat generated by such electronic packages may increase due to increased resistance under high temperature.
One common approach to draw the heat away from the die includes the use of a Heat Spreader (HS) in thermal contact with the die. This approach presents a manufacturing challenge to optimize a thermal-interface-design, for optimum heat transfer, while applying an adhesive material at the periphery of the HS for heat-spreader-attachment that will remain secure across a wide range of temperatures. To ensure thermal coupling between the HS and the die a Thermal Interface Material (TIM) is used.
The heat-spreader-attachment and the thermal-interface-design options are based, on performance considerations, in addition to cost effectiveness. These performance considerations include functional considerations such as thermal properties, and reliability considerations such as mechanical and environmental properties. In addition, the ease and cost of assembly and disassembly of the HS attachment structure are important.
A typical state of the art attachment of a HS to the backside of a high-power chip physically interconnects the HS structure to the system's substrate structure, namely the PCB. Such a design approach is used when there is a need to produce a high enough pressure at the thermal interface between the HS and the chip package. Such pressure is often needed for a satisfactory thermal performance of the interface.
Also known in the art are attachments of an HS to the PS, rather than to the PCB. Designs of this type are not intended and, in many cases, are not even supposed to produce high pressure at the HS/chip interface. Such HS to chip package attachment designs in the current art are acceptable if a relatively low pressure, for example a pressure in the range of 5-20 psi, can ensure a satisfactory thermal management of the integrated circuit (IC) device.
Long term reliability may suffer with these HS to chip package attachment designs due to failure of the TIM between the package and the HS. The encapsulant of the chip package may act as a thermal resistance keeping much of the heat close to the IC.
Thus, a need still remains for an integrated circuit packaging system with heat spreader that can be efficiently manufactured and operated reliably for the useful life of the integrated circuit. In view of the trend toward higher integration in chip packages, it is increasingly critical that answers be found to these problems. In view of the ever-increasing commercial competitive pressures, along with growing consumer expectations and the diminishing opportunities for meaningful product differentiation in the marketplace, it is critical that answers be found for these problems. Additionally, the need to reduce costs, improve efficiencies and performance, and meet competitive pressures adds an even greater urgency to the critical necessity for finding answers to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.